TL;DRIBM is showing of a sub-nm architecture, having created a 3D “nanostack” design at the 0.7nm node.The technology builds vertical towers of transistors, staggering their placement, to increase density.IBM believes that its design could be ready for production with the next 5 years.Only a few years back, we were still looking forward to smartphone chips manufactured on a 2nm process as the next big thing. Fabrication advancements have now made 2nm chips a reality — so what’s next? Engineers have already been pushing the limits of physics for a while now, and although they’re probably going to come up against a wall at some point, we’re not there quite yet, as IBM announces its new 0.7nm solution.A smaller and smaller fabrication level isn’t the only factor that impacts chip performance, but it’s nonetheless still a very important one. As we go smaller, not only can manufacturers fit more chips on the same silicon wafer, but those chips have the potential to run faster and cooler, thanks to more compact designs and shorter paths for data to travel.