Jolly Shah, an embedded software leader at FAANG, is making notable contributions to the field of scalable, power-efficient firmware and sustainable computing. With an engineering career spanning over 18 years, she has played key roles at some big semiconductor companies and other industry-defining organizations, specializing in the architecture and development of low-power firmware for embedded devices, multicore SoCs, and data center storage controllers. Jolly’s expertise centers on building resilient firmware systems that manage performance, energy consumption, and reliability behind the scenes—enabling billions of digital transactions to occur seamlessly and efficiently across the globe. In today’s rapidly expanding digital landscape, the hidden infrastructure powering cloud services and intelligent devices must operate with unwavering reliability and minimal energy waste. As demands on global computing infrastructure intensify, the intersection of sustainability and firmware design has moved to the forefront of engineering. Jolly’s approach positions sustainability as an architectural imperative, demonstrating how firmware engineers are uniquely poised to address environmental impact while advancing efficiency and performance standards at scale.The origins of sustainable firmware thinkingJolly first recognized the critical link between firmware engineering and sustainability during her tenure at Audience Inc., where she developed always-on voice DSPs that required extreme resource efficiency. She notes, "The connection first became clear to me during my time at Audience Inc. Working on always-on voice DSPs, I realized that firmware wasn't just about functionality; it was about resource stewardship."Her mindful approach, which she calls a "milliwatt mindset," deepened as she moved into roles, expanding her perspective from battery-operated devices to datacenter-scale storage systems. "I had to write code that allowed devices to listen continuously without draining the battery, which meant every clock cycle and power state transition mattered. I later applied this 'milliwatt mindset' to 'megawatt problems', ensuring that massive datacenter storage systems run as efficiently as possible." The awareness reflects a broader trend in technology, as platform management units and power management controllers in multicore SoCs are increasingly tasked with advanced, fine-grained energy management—an evolution described in technical analyses of platform management firmware for modern semiconductors.This early encounter with the necessity of balancing function and efficiency laid the groundwork for a career defined by intelligent partitioning of resources and relentless optimization of underlying system software.Defining success where efficiency is invisibleMeasuring achievement in firmware engineering is a nuanced task, especially when the best results are often unseen by end users. Jolly explains, "For me, success is measured by the stability and efficiency of the system. In my work on low-power DSPs, success was quantitative: implementing dynamic clock scaling to shave off milliwatts so a device could listen longer."She also frames success in qualitative terms, emphasizing prevention: "Success is often qualitative and preventative: it's the crash that didn't happen because of a fix I implemented, or the security vulnerability that was mitigated before it could be exploited." The outcome is a seamless user experience, where devices operate quickly, securely, and with minimal energy. This philosophy aligns with emerging methodologies for energy and emissions accounting in large-scale data centers, highlighted by Google's location-based Scope 2 Carbon Footprint reporting and the deployment of carbon-aware scheduling to lower emissions.Jolly’s mindset points to a subtle but essential truth: The greatest technological advances in sustainability may manifest as the invisible, preventative work of engineering teams who keep large systems optimized and resilient without drawing attention.Principles of sustainable system designGuiding frameworks are crucial in balancing speed, resilience, and energy use in firmware design for global infrastructure. Jolly asserts, "My approach to sustainable design is guided by the principle that power consumption must always be proportional to the workload. I don't believe in static power profiles; instead, I implement dynamic clock scaling and centralized platform management to ensure every subsystem—whether it's a sensor hub or a massive storage controller—only draws exactly what it needs, when it needs it."This principle echoes advances in modular, configurable PMU firmware that can be tailored to specific application requirements, supporting precise power management through features such as memory retention modes and clock gating in complex SoCs. By applying these philosophies consistently from embedded devices to infrastructure, system energy use is shaped responsibly and adaptively in real time.Jolly’s approach affirms a growing consensus in the industry—sustainability must be embedded as a core criterion in the system lifecycle, from the architecture phase through operational maintenance.Orchestrating power in embedded and SoC systemsJolly’s experience stretches from constrained embedded contexts to multicore SoCs, offering a comparative vantage on energy optimization strategies. "In embedded devices, optimization is about reactivity—implementing dynamic clock scaling and aggressive sleep modes to support always-on features with minimal drain. In multicore SoCs, it shifts to orchestration—using a central Platform Management Unit to balance power across heterogeneous cores so they don't compete for resources."This orchestration increasingly relies on modular PMU firmware architectures, which allow for the addition, enabling, or disabling of custom power management modules as system demands evolve. "I see the biggest opportunity in converging reliability with efficiency. By designing firmware that supports self-healing capabilities, we can eliminate the energy-expensive downtime associated with system failures. Sustainable engineering isn't just about running at lower power; it's about keeping the system stable enough to never waste energy on recovery."As highlighted in recent technical research, the integration of fine-grained multi-core power management controllers and memory subsystems facilitates major reductions in both active and idle power, underscoring the transformative potential of software-driven resource management across architectures.Ensuring reliability for AI-scale workloadsAs artificial intelligence workloads become a dominant force on digital infrastructure, the demands on reliability and efficiency intensify. Jolly highlights the necessity of autonomous system resilience. "I design for stability by building autonomous resilience into the firmware. My experience with heterogeneous SoCs taught me that you cannot rely on a single core to do everything; you need a Platform Management Unit to orchestrate resources and isolate faults. If one subsystem falters under load, it recovers locally without crashing the host."Her strategy includes the pairing of dynamic clock scaling with autonomous fault isolation, promoting high throughput and continuous uptime even under peak conditions: "Combined with dynamic clock scaling, this ensures the system is resilient enough to handle peak loads and efficient enough to sustain them." This perspective is echoed in both academic reviews of SoC system design, which identify cross-layer resilience and energy-aware control as essential vectors for scalability and sustainable operation, and in technical guidance on using platform-level orchestration for high-reliability multicore systems.The result is a firmware-driven approach to infrastructure: responsive, adaptive, and robust against an era of ever-expanding compute and data requirements.Sustainability in architectural decisionsJolly’s architectural strategy for sustainability rests on proactive partitioning and adaptive design. She explains, "I incorporate sustainability by focusing on intelligent partitioning and adaptability. Early in the architecture phase, I ask: 'What is the lowest-power resource that can reliably handle this task?' My background in heterogeneous computing taught me to push background tasks to dedicated low-power controllers, keeping the main engines asleep. Finally, I design for longevity; I ensure the system remains stable and useful for years, minimizing the need for replacement."Integrating power and memory controllers that support fast transitions between active, idle, and deep sleep states further optimizes lifetime efficiency—techniques validated in comparative studies of power management for DSPs and emerging SoC platforms. Such strategies not only reduce active energy consumption but also extend the operational lifespan of infrastructure—directly impacting sustainability objectives by lowering the environmental cost of electronics throughout their lifecycle.These practices align with evolving industry standards, where federated carbon intelligence and advanced measurement techniques are enabling next-generation energy-aware design for large computing fleets, as explored in research on real-time fleet optimization and cloud-scale emission control.Guiding the next generation of responsible engineersFor Jolly, responsible technology starts with adopting a holistic view of both power and reliability. She advises, "My advice is to stop viewing power optimization as just a battery-saving feature and start viewing it as architectural hygiene. I also advise engineers to equate reliability with sustainability. The most responsible system is one that is robust enough to last and smart enough to consume only exactly what it needs."This perspective is increasingly recognized as foundational—not only in firmware development but throughout hardware engineering, as the industry invests in robust frameworks for GreenOps, carbon-neutral cloud operations, and global-scale distributed computing. Training and mentoring the next generation to prioritize architectural integrity ensures continuity and acceleration of advanced sustainability practices.In addition to technical ingenuity, Jolly’s emphasis on reliability over replacement fosters a mindset shift that is needed for truly sustainable infrastructure, supporting the industry’s movement toward a digital future that balances innovation, scale, and responsibility.The evolution of sustainable firmware design is unfolding in the hands of engineers who embrace complexity, adapt architectures for low energy, and see reliability as a key measure of environmental impact. Jolly’s work demonstrates that the most effective contributions are often invisible—achieved in code, orchestrations, and design choices that quietly shape the future of global technology with every efficient transaction.\:::tipThis story was distributed as a release by Jon Stojan under HackerNoon’s Business Blogging Program. :::\